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X-WR-CALNAME:Balancing Co-Design and Flexibility for Compute and Communicat
 ion in Next-generation AI Platforms
X-WR-TIMEZONE:Eastern Time (US & Canada)
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DTSTAMP:20260807T224555Z
UID:tag:localist.com\,2008:EventInstance_48055331814583
DTSTART:20241121T193000Z
DTEND:20241121T203000Z
DESCRIPTION:Title: Balancing Co-Design and Flexibility for Compute and Comm
 unication in Next-generation AI Platforms\n\nSpeaker: Tushar Krishna\, Ass
 ociate Professor in the School of Electrical and Computer Engineering (ECE
 ) at Georgia Institute of Technology\n\n\nAbstract:\nThe Cambrian explosio
 n in Artificial Intelligence (AI) use cases\, coupled with massive compute
  and memory requirements for both training and serving AI models (such as 
 LLMs) has led to high-performance computing platforms specialized for AI (
 such as NVIDIA HGX\, AMD MI300X\, Google Cloud TPU\, xAI Colossus\, ..). T
 hese platforms exemplify the idea of “cross-stack co-design” – from 
 AI algorithms to software to hardware to even circuits/devices – to gain
  extreme efficiency. Co-design remains a challenging problem by itself tod
 ay - given the massive design-space encompassing diverse AI model shapes\,
  model optimizations (e.g.\, quantization\, sparsity)\, parallelism strate
 gies\, compute/communication scheduling\, hardware (compute\, memory\, net
 work) configurations\, and emerging technology choices (chiplets\, 2.5/3D\
 , waferscale\, photonics). Unfortunately\, co-design also comes at odds wi
 th the need for “cross-stack flexibility” – to enable continued evol
 ution in AI algorithms and AI platforms (both software and hardware). \n\n
  \n\nIn this talk\, I will demonstrate systematic techniques for addressin
 g this dichotomy\, via a judicious balance between co-design and flexibili
 ty.  Specifically\, I will present examples from our work across the stack
 \, spanning dataflow support in AI compute accelerators\, collective commu
 nication support in AI network fabrics\, and compression support in AI mod
 els. I will also provide a brief glimpse on how we are leveraging these id
 eas towards designing efficient AI platforms for emerging paradigms includ
 ing privacy-preserving AI\, eXtended Reality\, and Neurosymbolic AI.\n\n \
 n\n\nSpeaker Bio:\nTushar Krishna is an Associate Professor in the School 
 of Electrical and Computer Engineering (ECE) at Georgia Institute of Techn
 ology\, with a courtesy appointment in Computer Science. He held the ON Se
 miconductor (Endowed) Junior Professorship in ECE at Georgia Tech from 201
 9-2021. He has also been a visiting researcher at Harvard University CS (2
 024-25)\, a visiting professor at MIT EECS + CSAIL (2023-24)\, and a resea
 rcher at Intel’s VSSAD group (2013-2014). He has a Ph.D. in Electrical E
 ngineering and Computer Science from MIT (2014)\, a M.S.E in Electrical En
 gineering from Princeton University (2009)\, and a B.Tech in Electrical En
 gineering from the Indian Institute of Technology (IIT) Delhi (2007).\n\n 
 \n\nDr. Krishna’s research spans computer architecture\, interconnection
  networks\, networks-on-chip (NoC)\, and AI/ML accelerator systems – wit
 h a focus on optimizing data movement in modern computing platforms. His r
 esearch is funded via multiple awards from NSF\, DARPA\, IARPA\, SRC (incl
 uding JUMP2.0)\, Department of Energy\, Intel\, Google\, Meta/Facebook\, Q
 ualcomm and TSMC. His papers have been cited over 17\,000 times. Three of 
 his papers have been selected for IEEE Micro’s Top Picks from Computer A
 rchitecture\, one more received an honorable mention\, and four have won b
 est paper awards. Dr. Krishna’s PhD graduates have won best dissertation
  awards from both ACM SIGARCH and ACM SIGMICRO.\n\n \n\nDr. Krishna was in
 ducted into the HPCA Hall of Fame in 2022. At Georgia Tech\, he has been h
 onored by the “Class of 1940 Course Survey Teaching Effectiveness Award
 ” in 2018\, the “Roger P. Webb Outstanding Junior Faculty Award” fro
 m the School of ECE in 2021\, the “Richard M. Bass/Eta Kappa Nu Outstand
 ing Junior Teacher Award” in 2023\, and the “Roger P. Webb Outstanding
  Mid-career Faculty Award” from the School of ECE in 2024.\n\n \n\nDr. K
 rishna currently serves as an Associate Director for the Center for Resear
 ch into Novel Computing Hierarchies (CRNCH) – a cross-disciplinary resea
 rch center at Georgia Tech. He is also a co-chair of the Chakra Execution 
 Traces and Benchmarks Working group within ML Commons.
GEO:42.363197;-71.127278
LOCATION:Science and Engineering Complex (SEC)\, LL2.221
SUMMARY:Balancing Co-Design and Flexibility for Compute and Communication i
 n Next-generation AI Platforms
URL;VALUE=URI:https://events.seas.harvard.edu/event/balancing-co-design-and
 -flexibility-for-compute-and-communication-in-next-generation-ai-platforms
CATEGORIES:Colloquia / Seminar / Lecture
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