Title: Balancing Co-Design and Flexibility for Compute and Communication in Next-generation AI Platforms

Speaker: Tushar Krishna, Associate Professor in the School of Electrical and Computer Engineering (ECE) at Georgia Institute of Technology

Abstract:
The Cambrian explosion in Artificial Intelligence (AI) use cases, coupled with massive compute and memory requirements for both training and serving AI models (such as LLMs) has led to high-performance computing platforms specialized for AI (such as NVIDIA HGX, AMD MI300X, Google Cloud TPU, xAI Colossus, ..). These platforms exemplify the idea of “cross-stack co-design” – from AI algorithms to software to hardware to even circuits/devices – to gain extreme efficiency. Co-design remains a challenging problem by itself today - given the massive design-space encompassing diverse AI model shapes, model optimizations (e.g., quantization, sparsity), parallelism strategies, compute/communication scheduling, hardware (compute, memory, network) configurations, and emerging technology choices (chiplets, 2.5/3D, waferscale, photonics). Unfortunately, co-design also comes at odds with the need for “cross-stack flexibility” – to enable continued evolution in AI algorithms and AI platforms (both software and hardware).

In this talk, I will demonstrate systematic techniques for addressing this dichotomy, via a judicious balance between co-design and flexibility.  Specifically, I will present examples from our work across the stack, spanning dataflow support in AI compute accelerators, collective communication support in AI network fabrics, and compression support in AI models. I will also provide a brief glimpse on how we are leveraging these ideas towards designing efficient AI platforms for emerging paradigms including privacy-preserving AI, eXtended Reality, and Neurosymbolic AI.

Speaker Bio:
Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering (ECE) at Georgia Institute of Technology, with a courtesy appointment in Computer Science. He held the ON Semiconductor (Endowed) Junior Professorship in ECE at Georgia Tech from 2019-2021. He has also been a visiting researcher at Harvard University CS (2024-25), a visiting professor at MIT EECS + CSAIL (2023-24), and a researcher at Intel’s VSSAD group (2013-2014). He has a Ph.D. in Electrical Engineering and Computer Science from MIT (2014), a M.S.E in Electrical Engineering from Princeton University (2009), and a B.Tech in Electrical Engineering from the Indian Institute of Technology (IIT) Delhi (2007).

Dr. Krishna’s research spans computer architecture, interconnection networks, networks-on-chip (NoC), and AI/ML accelerator systems – with a focus on optimizing data movement in modern computing platforms. His research is funded via multiple awards from NSF, DARPA, IARPA, SRC (including JUMP2.0), Department of Energy, Intel, Google, Meta/Facebook, Qualcomm and TSMC. His papers have been cited over 17,000 times. Three of his papers have been selected for IEEE Micro’s Top Picks from Computer Architecture, one more received an honorable mention, and four have won best paper awards. Dr. Krishna’s PhD graduates have won best dissertation awards from both ACM SIGARCH and ACM SIGMICRO.

Dr. Krishna was inducted into the HPCA Hall of Fame in 2022. At Georgia Tech, he has been honored by the “Class of 1940 Course Survey Teaching Effectiveness Award” in 2018, the “Roger P. Webb Outstanding Junior Faculty Award” from the School of ECE in 2021, the “Richard M. Bass/Eta Kappa Nu Outstanding Junior Teacher Award” in 2023, and the “Roger P. Webb Outstanding Mid-career Faculty Award” from the School of ECE in 2024.

Dr. Krishna currently serves as an Associate Director for the Center for Research into Novel Computing Hierarchies (CRNCH) – a cross-disciplinary research center at Georgia Tech. He is also a co-chair of the Chakra Execution Traces and Benchmarks Working group within ML Commons.